Publications of the SPARK Project

Links to papers that cite SPARK

Press

Disclaimer -- The following publications and presentations are covered by copyright. The articles are provided here for reference and you may browse them in the same spirit as you may read a journal or a proceeding article in a public library. Retrieving, copying, distributing these files may violate copyright protection law. You may also need the permission of the publisher (IEEE/ACM) to re-print or distribute these articles.

Book

Thesis

Journal Papers

  1. Coordinated Parallelizing Compiler Optimizations and High-Level Synthesis,
    S. Gupta, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Accepted for publication in ACM TODAES.
  2. Using Global Code Motions to Improve the Quality of Results for High-Level Synthesis
    S. Gupta, N. Savoiu, N.D. Dutt, R.K. Gupta, A. Nicolau,
    IEEE Transactions on Computer-Aided Design, February 2004.
  3. Dynamically Increasing the Scope of Code Motions during the High-Level Synthesis of Digital Circuits,
    S. Gupta, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Invited Paper in Special Issue of IEE Proceedings: Computers and Digital Technique: Best of DATE 2003, Vol 150(5), September 2003.

Conference Papers

  1. Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow,
    S. Gupta, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Design, Automation and Test in Europe, Feb. 2004
  2. Hardware and Interface Synthesis of FPGA Blocks using Parallelizing Code Transformations,
    S. Gupta, M. Luthra, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Invited talk at the special session on Synthesis For Programmable Systems at the International Conference on Parallel and Distributed Computing and Systems, November 2003
  3. Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs, (ps or pdf)
    S. Gupta, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Design, Automation and Test in Europe, March 2003
  4. SPARK : A High-Level Synthesis Framework For Applying Parallelizing Compiler Transformations (ps or pdf)
    S. Gupta, N.D. Dutt, R.K. Gupta, A. Nicolau,
    International Conference on VLSI Design, January 2003
    Best Paper Award
  5. Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis (ps or pdf)
    S. Gupta, M. Reshadi, N. Savoiu, N.D. Dutt, R.K. Gupta, A. Nicolau,
    International Symposium on System Synthesis, October 2002
  6. Coordinated Transformations for High-Level Synthesis of High Performance Microprocessor Blocks (ps or pdf)
    S. Gupta, T. Kam, M. Kishinevsky, S. Rotem, N. Savoiu, N.D. Dutt, R.K. Gupta, A. Nicolau,
    To appear at the Design Automation Conference, June 2002

  7. Conditional Speculation and its Effects on Performance and Area for High-Level Synthesis (ps or pdf)
    S. Gupta, N. Savoiu, N.D. Dutt, R.K. Gupta, A. Nicolau,
    International Symposium on System Synthesis, October 2001
  8. Speculation Techniques for High Level synthesis of Control Intensive Designs (ps or pdf)
    S. Gupta, N. Savoiu, S. Kim, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Design Automation Conference, June 2001

Technical Reports

  1. Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow
    S. Gupta, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Technical Report #CECS-TR-03-14, Center for Embedded Computer Systems, University of California, Irvine, April 2003

  2. Coordinated Parallelizing Compiler Optimizations and High-Level Synthesis
    S. Gupta, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Technical Report #CECS-TR-02-35, Center for Embedded Computer Systems, University of California, Irvine, December 2002

  3. Using Global Code Motions to Improve the Quality of Results for High-Level Synthesis
    S. Gupta, N. Savoiu, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Technical Report #CECS-TR-02-29, Center for Embedded Computer Systems, University of California, Irvine, October 2002

  4. Conditional Speculation and its Effects on Performance and Area for High-Level Synthesis
    S. Gupta, N. Savoiu, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Technical Report #01-25, Dept. of Information and Computer Science, Univ. of California, Irvine, June 2001

  5. Speculation Techniques for High Level synthesis of Control Intensive Designs (ps or pdf)
    S. Gupta, N. Savoiu, S. Kim, N.D. Dutt, R.K. Gupta, A. Nicolau,
    Technical Report #00-40, Dept. of Information and Computer Science, Univ. of California, Irvine, Dec. 2000

Presentations, Posters and other Miscellaneous Events



Maintained by Sumit Gupta <sumitg at ieee.org>