The embedded systems and software group spans research in various aspects of embedded systems hardware and software, particularly for microelectronic implementations. Our current projects include innovative processor architectures, VLSI design automation for billion-scale microelectronic systems-on-chip, aggressive parallelization techniques, architectural modeling and compiler optimizations for multiprocessor heterogenous architectures, fault-tolerance and manufacturing test for microscale and nanoscale devices, ultra low-power hardware and software designs, and applications programming, systems software for sensor networks and systems.

Faculty

Graduate Students

News

• Mar. 04, 2004: pursuing Excellence in DFM at UCSD: An Interview with Dr. Andrew Kahng: Full Story
• Dec. 22, 2003: EE Time article on statictical timing paper and tutorial at ICCAD 2003 by graduate student Gupta and Professor Kahng.
• Dec. 15, 2003: EE Times article about X-based routing: prototype tools were implemented at UCSD by the VLSI/CAD group.
• Nov. 17, 2003: EE Times articles about statistical paper presented by graduate student Gupta and Professor Kahng at ICCAD 2003.
• Sep. 19, 2003: Public release of SPARK High-Level Synthesis Tool by Sumit Gupta et al.

Recent Publications

• "Formal Refinement-checking in a System-level Design Methodology", J.P. Talpin, P. Le Guernic, S. Shukla, F. Doucet and R. Gupta, To appear in Fundamenta Informaticae, August 2004.
• "Dynamic Voltage Scaling for System-wide Energy minimization in Real-Time Embedded Systems", R. Jejurikar, R. Gupta, In Proc. of International Symposium on Low Power Electronics and Design (ISLPED '04), Aug 2004.
• "Optimized Slowdown in Real-Time Task Systems", R. Jejurikar, R. Gupta, In Proc. of Euromicro Conference on Real-Time Systems (ECRTS '04), Jun-Jul, 2004.
• Procrastination Scheduling for Fixed Priority Real-Time Systems", R. Jejurikar, R. Gupta, In Proc. of  ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES '04), June, 2004
• "Placement Feedback: A Concept and Method for Better Min-Cut Placements", A. B. Kahng and S. Reda, In Proc. of the ACM/IEEE Design Automation Conf., June 2004
• "Selective GateLength Biasing for Cost Effective Runtime Leakage Control", P. Gupta, A. B. Kahng and P. Sharma, In Proc of the ACM/IEEE Design Automation Conf., June 2004
  
• "Quantum-Dot Cellular Automata (QCA) Circuit Partitioning: Problem Modeling and Solutions", D. A. Antonelli, T. J. Dysart, D. Z. Chen, X. S. Hu, A. B. Kahng, P. M. Kogge and R. C. Murphy, In Proc of the ACM/IEEE Design Automation Conf., June 2004
• "Toward a Methodology for Manufacturability Driven Design Rule Exploration", L. Capodieci, P. Gupta, A. B. Kahng, D. Sylvester and J. Yang, In Proc. of the ACM/IEEE Design Automation Conf., June 2004
• Leakage Aware Dynamic Voltage Scaling for Real-Time Embedded Systems", R. Jejurikar, C. Pereira, R. Gupta, In Proc. of Design Automation Conference (DAC '04), June 2004.
• "Systematic Development and Exploration of Service-Oriented Software Architectures", I. H. Krüger, R. Mathew, In Proc. of the 4th Working IEEE/IFIP Conference on Software Architecture (WICSA'04), June 2004.
• "Towards a Process and Tool-Chain for Service-Oriented Automotive Software Engineering", I. H. Krüger, D. Gupta, R. Mathew, P. Moorthy, W. Phillips, S. Rittmann and J. Ahluwalia, In Proc. of the ICSE Workshop on Software Engineering for Automotive Systems (SEAS), May 2004
• "A Methodology for Scenario-Based Requirments Capture", J. Whittle, I. H. Krüger, In Proc. of the ICSE  Workshop on Scenarios and State Machines (SCESM'04), May 2004
• On the Interference of Communication on Computation in Java , B. Kreaseck, L. Carter, H. Casanova, J. Ferrante, In Third International IEEE Workshop on Performance Modeling, Evaluation and Optimization of Parallel and Distributed Systems, April, 2004
• Scheduling Strategies for Master-Slave Tasking on Heterogeneous Processor Platforms, C. Baninio, O. Beaumont, L. Carter, J. Ferrante, A. Legrand, Y. Robert, In IEEE Transactions on Parallel and Distributed Systems , April 2004.
• "Scalable Heuristics for Design of DNA Probe Arrays", A. B. Kahng, I. I. Mandoiu, P.A. Pevzner, S. Reda and A. Zelikovsky, To appear in Journal of Computational Biology, 2004.
• Local Unidirectional Bias for Cutsize-Delay Tradeoff in Performance-Driven Bipartition", A. B. Kahng and X. Xu,  IEEE Transactions on Computer-Aided Design, April 2004
• "MultiProject Reticle Floorplanning and Wafer Dicing",  A. B. Kahng, I. I. Mandoiu, Q. Wang, X. Xu, and A. Zelikovsky, In Proc. ACM/IEEE Intl. Symp. on Physical Design, April 2004
• "Implementation and Extensibility of an Analytic Placer", A. B. Kahng, and Q. Wang,  In Proc. ACM/IEEE Intl. Symp. on Physical Design, April 2004
• "On Legalization of Row-Based Placements", A. B. Kahng, I. L. Markov and S. Reda, In Proc.ACM/IEEE GLSVLSI, April 2004
• "Match Twice and Stitch: A New TSP Tour Construction Heuristic", A. B. Kahng and S. Reda, To appear in Operations Research Letters, 2004
  
• "A Behavioral Type Inference System for Compositional System-on-Chip Design", J.-P. Talpin, D. Berner, S. Shukla, A. Gamatie, P. Le Guernic and R. Gupta, To appear in Application of Concurrency to System Design (ACSD), Hamilton, Ontario, Canada, June 2004.
• "Formal Methods and Models for System Design, A System Level Perspective", edited by R. Gupta, P. Le Guernic, S. Shukla and J.P. Talpin, Kluwer Academic Publishers, June 2004
• "SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits", Sumit Gupta, R.K. Gupta, N.D. Dutt and A. Nicolau, Kluwer Academic Publishers, May 2004
• Scheduling Strategies for Master-Slave Tasking on Heterogeneous Processor Platforms, C. Baninio, O. Beaumont, L. Carter, J. Ferrante, A. Legrand, Y. Robert, IEEE Transactions on Parallel and Distributed Systems, Apr. 2004.
• "MultiProject Reticle Floorplanning and Wafer Dicing",  A.B. Kahng, I.I. Mandoiu, Q. Wang, X. Xu, and A. Zelikovsky, Proc. ACM/IEEE Intl. Symp. on Physical Design, April 2004, to appear.
• "Implementation and Extensibility of an Analytic Placer", A.B. Kahng, and Q. Wang,  Proc. ACM/IEEE Intl. Symp. on Physical Design, April 2004, to appear.
• "Clustered Multithreaded Architectures -- Pursuing Both IPC and Cycle Time", J. D. Collins, D. M. Tullsen, In 18th International Parallel and Distributed Processing Symposium, April, 2004.
• "How to Use SimPoint to Pick Simulation Points", G. Hamerly, E. Perelman, and B. Calder, ACM SIGMETRICS Performance Evaluation Review, Volume 31(4), March 2004 
• "Using a Serial Cache for Energy Efficient Instruction Fetching", G. Reiman and B. Calder, In Journal of Systems Architecture, 2004, 
• "Structures for Phase Classification", J. Lau, S. Schoenmackers, and B. Calder, In proc. of the IEEE International Symposium on Performance Analysis of Systems and Software, March 2004 
• "A Co-Phase Matrix to Guide Simultaneous Multithreading Simulation", M. Van Biesbrouck, T. Sherwood, and B. Calder, In Proc. of the IEEE International Symposium on Performance Analysis of Systems and Software, March 2004 
• "Deterministic Memory-Efficient String Matching Algorithms for Intrusion Detection", N. Tuck, T. Sherwood, B. Calder, and G. Varghese, In Proc. of the IEEE Infocom Conference, March 2004.
• "Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow", S. Gupta, N.D. Dutt, R.K. Gupta and A. Nicolau, In Proc of Design, Automation and Test in Europe (DATE'04), Feb 2004.
• "Service Specification with MSCs and Roles", I. Krüger, In Proc of the IASTED International Conference on Software Engineering, Feb. 2004
• "Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction", R. Kumar, K. Farkas, N. P. Jouppi, P. Ranganathan, D. M. Tullsen, In 36th International Symposium on Microarchitecture, December, 2003.
• "Creating Converged Trace Schedules Using String Matching", S. Narayanasamy, Y. Hu, S. Sair and B. Calder, In the 10th International Symposium on High Performance Computer Architecture, February 2004
• "Effective Iterative Techniques for Fingerprinting Design IP", A. E. Caldwell, H.-J. Choi, A. B. Kahng, S. Mantik, M. Potkonjak, G. Qu and J. L. Wong,In IEEE Transactions on Computer-Aided Design, Febuary 2004.
• "Non-tree Routing for Reliability and Yield Improvement", A. B. Kahng, B. Liu and I. I. Mandoiu, In IEEE Transactions on Computer-Aided Design, January 2004
• "Wire Swizzling to Reduce Delay Uncertainty Due to Capacitive Coupling", P. Gupta and A.B. Kahng, In Proceedings of the International Conference on VLSI Design, January 2004
• "Efficient RT-level Fault Diagnosis Methodology", O. Sinanoglu and A. Orailoglu, In Proceedings of the Asian South Pasific Design Automation Conference (ASPDAC), January 2004.
• "Optimizing Sizing Analyses for Mesh-Based Power Plans", H. Chen, C. K. Cheng, A. B. Kahng, M. Mori and Q. Wang, In Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), January 2004
• "Combinatorial Group Testing Methods for the BIST Diagnosis Problem", A. B. Kahng and S. Reda, In Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), January 2004
• "Balboa: A Component-Based Design Environment for System Models", F. Doucet, S. Shukla, M. Otsuka and R. Gupta, In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, December 2003
• "Enhancing Reliability of RTL Controller-Datapath Circuits via Invariant-Base Concurrent Test", Y. Makris, I. Bayraktaroglu and A. Orailoglu, In IEEE Transactions on Reliability, December 2003.
• "Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction", R. Kumar, K. Farkas, N. P. Jouppi, P. Ranganathan and D. M. Tullsen, In 36th International Symposium on Microarchitecture, December, 2003
• "Discovering and Exploiting Program Phases", T. Sherwood, E. Perelman, G. Hamerly, S. Sair and Brad Calder, In IEEE Micro: Micro's Top Picks from Computer Architecture Conferences, December 2003

Projects and Laboratories

Affiliations

CWC

Sponsors