Description
The goal of the Balboa project is to investigate the usage of high
level methodologies, languages and CAD tools for system-on-chip
architectural modeling. The research is divided into three
sub-projects.
Structured system composition
This part is the core Balboa component integration environment, which
is used to build system models with IP libraries. The environment
implements split-programming concepts combined with component-based
design development, in a loosely typed integration environment.
System models are assembled from C++ libraries. The scripting layer
implements Tcl and OTcl extensions in a Component Integration
Language (CIL). We refer to the C++ IP blocks as components (as a
unit of reuse). Components can use a simulation library, SystemC in
some examples and the Balboa simulation library in others to model
concurrency. A customized Interface Definition Language named
BIDL is used to export C++ components to the Balboa environment.
The environment run-time infrastructure is aware of object models of
components and uses object-oriented mechanism to compose
architectures. A type system keeps the coherency between the
interpreted and the compiled layer and perform type inference. In the
long term, we investigate how we can rely on the type system to infer
architectures.
Concurrency exploitation and simulation efficiency
This work investigates simulation efficiency using different threading
mechanisms at the specification level. It also research implications
of threaded kernel into the specification language. Techniques
predict simulation efficiency from concurrency and target platform
analysis in order to reassign concurrency to enhance efficiency. More
information about this work can be found here.
Design composition vizualisation and visual formalisms
This work investigate visual formalisms for architecture specification
and composition. It also relies on type-instance views to help the
designer in abstracting architectural details. Although many notations
are investigated, a GUI front end implementing an interactive
structural specification tool with extended subsets of UML with block
diagram-style notations, is currently being implemented.
Publications
Conferences and Workshops
| [pdf]
| F. Doucet, S. Shukla, M. Otsuka and R. Gupta
Balboa: A Component-Based Design Environment for System Models
In IEEE Transaction on Computer-Aided Design of Integrated Circuits and
Systems, Dec. '03 |
| [pdf]
| J.-P. Talpin, P. Le Guernic, S. K. Shukla, R. Gupta and F. Doucet
Polychrony for formal refinement-checking in a system-level design methodology
In Proc of Application of Concurrency to System Design, 2003 |
| [pdf]
| J.-P. Talpin, P. Le Guernic, S. K. Shukla, R. Gupta and F. Doucet
A polychronous model for high-level component-based system design
In Proc. Design Automation and Test in Europe, 2003 |
| [pdf]
| J.-P. Talpin, P. Le Guernic, S. K. Shukla, R. Gupta and F. Doucet
A polychronous model for high-level component-based system design
In Proc. Design Automation and Test in Europe, 2003 |
| [pdf]
| F. Doucet, S. Shukla, and R. Gupta,
Introspection in System-Level Language Frameworks: Meta-level vs. Integrated
In Proc. Design Automation and Test in Europe, 2003 |
| [pdf]
| F. Doucet, S. Shukla, and R. Gupta,
Typing Abstractions and Management in a Component Framework,
In Proc. of Asia and South Pacific Design Automation Conference, 2003
|
| [pdf]
| S. Shukla, F. Doucet and R. Gupta,
Structured Composition Techniques for Embedded Systems,
In Proc. of International Conference on High Performance Computing, 2002
|
| [pdf]
| F. Doucet, M. Otsuka, S. Shukla, and R. Gupta,
An Environment for Dynamic Component Composition for Efficient Co-Design,
In Proc. Design Automation and Test in Europe, 2002
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[pdf]
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F. Doucet, R. Gupta, M. Otsuka, P. Schaumont and S. Shukla,
Interoperability as a Design Issue in C++ Based Modeling Environment,
In Proc. International Symposium on System Synthesis, 2001
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[pdf]
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F. Doucet, V. Sinha and R. Gupta,
Structural Design Composition for C++ Hardware Models,
In Proc. Computer Society VLSI Workshop, 2001
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[pdf]
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P. Garg, S. Shukla and R. K. Gupta,
Efficient Usage of Concurrency Models in an Object-Oriented Co-design Framework,
In Proc. Design Automation and Test in Europe 2001
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[pdf]
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V. Sinha, F. Doucet, C. Siska, R. K. Gupta, S. Liao and A. Ghosh,
YAML: A Tool for Design Visualization and Capture,
In Proc. International Symposium on System Synthesis, 2000
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[pdf]
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F. Doucet, V. Sinha and R. K. Gupta,
Microelectronic System-on-Chip Modeling using Objects and their Relationships,
OSEE 2000
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Technical Reports
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[pdf]
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F. Doucet, M. Otsuka, R. Gupta and S. Shukla,
Efficient System Level Co-Design Environment using Split Level Programming,
Technical Report 01-34, CECS/UCI, July 2001
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[pdf]
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V. Sinha and R. K. Gupta,
Design Visualization and Entry using Structural and Functional Entities,
Technical Report 00-05, CECS/UCI, Feb. 2000
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[n/a]
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F. Doucet, S. Kim and R Jerjurikar,
Oriented Design Translations: ICSP/SystemC to RTL VHDL,
Technical Report 00-50, CECS/UCI, Apr. 2000
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[pdf]
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F. Doucet and R. K. Gupta,
Debugging of Polymorphic SystemC/C++ Code for Hardware Design,
Technical Report 00-06, CECS/UCI, Feb. 2000
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[pdf]
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F. Doucet, V. Sinha, C. Siska and R. K. Gupta,
System-on-Chip Modeling using Objects and their Relationships,
Technical Report 99-53, CECS/UCI, Nov. 1999
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Members
Software
The Balboa software is currently being re-implemented. We will post
new version of Balboa environment, OS simulator and protocol
description analyzer tools. For the old version of the software please
download it from the old
Balboa UCI page but *beware* it does not compile with the recent
GCC version (3.x) found in Linux Redhat 9/Fedora Core 1.
Links
The Balboa project is supported by the
National Science Foundation,
Synopsys,
FCAR and
SRC
Frederic Doucet
Last modified: Fri Feb 20 16:37:59 PST 2004
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